diff --git a/proprietary/odm/bin/hw/vendor.qti.esepowermanager@1.1-service b/proprietary/odm/bin/hw/vendor.qti.esepowermanager@1.1-service new file mode 100644 index 0000000..22a5d2d Binary files /dev/null and b/proprietary/odm/bin/hw/vendor.qti.esepowermanager@1.1-service differ diff --git a/proprietary/odm/bin/hw/vendor.qti.secure_element@1.2-service b/proprietary/odm/bin/hw/vendor.qti.secure_element@1.2-service new file mode 100644 index 0000000..135b940 Binary files /dev/null and b/proprietary/odm/bin/hw/vendor.qti.secure_element@1.2-service differ diff --git a/proprietary/odm/etc/init/vendor.qti.esepowermanager@1.1-service.rc b/proprietary/odm/etc/init/vendor.qti.esepowermanager@1.1-service.rc new file mode 100644 index 0000000..e00ed02 --- /dev/null +++ b/proprietary/odm/etc/init/vendor.qti.esepowermanager@1.1-service.rc @@ -0,0 +1,16 @@ +# +# Copyright (c) 2017-2018, 2020 Qualcomm Technologies, Inc. +# All Rights Reserved. +# Confidential and Proprietary - Qualcomm Technologies, Inc. +# + +service qti_esepowermanager_service_1_1 /odm/bin/hw/vendor.qti.esepowermanager@1.1-service +##ifndef OPLUS_BUG_STABILITY +##Liuwenjie@CONNECTIVITY.NFC.CARDEMULATION.3190409, 2022/02/23, +##Modify for: Server run later ,avoid loader TA fail + #class early_hal +##else + class hal +##endif OPLUS_BUG_STABILITY + user system + group nfc system diff --git a/proprietary/odm/etc/init/vendor.qti.secure_element@1.2-service.rc b/proprietary/odm/etc/init/vendor.qti.secure_element@1.2-service.rc new file mode 100644 index 0000000..8466d45 --- /dev/null +++ b/proprietary/odm/etc/init/vendor.qti.secure_element@1.2-service.rc @@ -0,0 +1,10 @@ +service secureelement-hal_1_2 /odm/bin/hw/vendor.qti.secure_element@1.2-service +##ifndef OPLUS_BUG_STABILITY +##Liuwenjie@CONNECTIVITY.NFC.CARDEMULATION.3190409, 2022/02/23, +##Modify for: Server run later ,avoid loader TA fail + #class early_hal +##else + class hal +##endif OPLUS_BUG_STABILITY + user system + group system diff --git a/proprietary/odm/lib64/android.hardware.secure_element@1.0-impl.so b/proprietary/odm/lib64/android.hardware.secure_element@1.0-impl.so new file mode 100644 index 0000000..750bd6b Binary files /dev/null and b/proprietary/odm/lib64/android.hardware.secure_element@1.0-impl.so differ diff --git a/proprietary/odm/lib64/hw/vendor.qti.esepowermanager@1.1-impl.so b/proprietary/odm/lib64/hw/vendor.qti.esepowermanager@1.1-impl.so new file mode 100644 index 0000000..fca68c2 Binary files /dev/null and b/proprietary/odm/lib64/hw/vendor.qti.esepowermanager@1.1-impl.so differ diff --git a/proprietary/odm/lib64/vendor.qti.esepowermanager@1.0.so b/proprietary/odm/lib64/vendor.qti.esepowermanager@1.0.so new file mode 100644 index 0000000..79d7222 Binary files /dev/null and b/proprietary/odm/lib64/vendor.qti.esepowermanager@1.0.so differ diff --git a/proprietary/odm/lib64/vendor.qti.esepowermanager@1.1.so b/proprietary/odm/lib64/vendor.qti.esepowermanager@1.1.so new file mode 100644 index 0000000..8f9d718 Binary files /dev/null and b/proprietary/odm/lib64/vendor.qti.esepowermanager@1.1.so differ diff --git a/proprietary/vendor/etc/libnfc-nci.conf b/proprietary/vendor/etc/libnfc-nci.conf new file mode 100644 index 0000000..92f76b3 --- /dev/null +++ b/proprietary/vendor/etc/libnfc-nci.conf @@ -0,0 +1,122 @@ +########################## Start of libnfc-nci.conf ########################### +############################################################################### +# Application options +NFC_DEBUG_ENABLED=1 +############################################################################### +# performance measurement +# Change this setting to control how often USERIAL log the performance (throughput) +# data on read/write/poll +# defailt is to log performance dara for every 100 read or write +#REPORT_PERFORMANCE_MEASURE=100 +############################################################################### +# File used for NFA storage +NFA_STORAGE="/data/nfc" +############################################################################### +# Configure the default NfcA/IsoDep techology and protocol route. Can be +# either a secure element (e.g. 0xF4) or the host (0x00) +#DEFAULT_ISODEP_ROUTE=0x00 + +############################################################################### +## Default poll duration (in ms) +## The defualt is 500ms if not set +NFA_DM_DISC_DURATION_POLL=500 + +############################################################################### +# Force UICC to only listen to the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F +UICC_LISTEN_TECH_MASK=0x07 + +############################################################################### +# Force HOST listen feature enable or disable. +# 0: Disable +# 1: Enable +HOST_LISTEN_ENABLE=0x01 +############################################################################### +# When screen is turned off, specify the desired power state of the controller. +# 0: power-off-sleep state; DEFAULT +# 1: full-power state +# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used) +SCREEN_OFF_POWER_STATE=1 +############################################################################### +# Force tag polling for the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | +# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 | +# NFA_TECHNOLOGY_MASK_B_PRIME | +# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE. +# +# Notable bits: +# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ +# NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */ +# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ +# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */ +# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */ +# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */ +POLLING_TECH_MASK=0x4F +############################################################################### +# Force P2P to only listen for the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F | +# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE +# +# Notable bits: +# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ +# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ +# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */ +# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */ +P2P_LISTEN_TECH_MASK=0x44 +############################################################################### +PRESERVE_STORAGE=0x01 +############################################################################### +# Override the stack default for NFA_EE_MAX_EE_SUPPORTED set in nfc_target.h. +# The value is set to 3 by default as it assumes we will discover 0xF2, +# 0xF3, and 0xF4. If a platform will exclude and SE, this value can be reduced +# so that the stack will not wait any longer than necessary. + +# Maximum EE supported number +# NXP PN547C2 0x02 +# NXP PN65T 0x03 +# NXP PN548C2 0x02 +# NXP PN66T 0x03 +NFA_MAX_EE_SUPPORTED=0x03 +############################################################################## +# Deactivate notification wait time out in seconds used in ETSI Reader mode +# 0 - Infinite wait +NFA_DM_DISC_NTF_TIMEOUT=0 + +############################################################################### +# AID_MATCHING constants +# AID_MATCHING_EXACT_ONLY 0x00 +# AID_MATCHING_EXACT_OR_PREFIX 0x01 +# AID_MATCHING_PREFIX_ONLY 0x02 +#AID_MATCHING_EXACT_OR_SUBSET_OR_PREFIX 0x03 +AID_MATCHING_MODE=0x03 +############################################################################### +# Preferred Secure Element for Technology based routing +# eSE 0x01 +# UICC 0x02 + +NXP_PRFD_TECH_SE=0x01 + +################################################################################ +#Set bit to 1 , black list is enabled +#Set bit to 0, to disable balcklist +NFA_AID_BLOCK_ROUTE=0x00 + +############################################################################### +#Set the OffHost AID supported power state: +OFFHOST_AID_ROUTE_PWR_STATE=0x3B + +################################################################################ +# Maximum WTX requests entertained by MW +NXP_WM_MAX_WTX_COUNT=30 +################################################################################ +#Set the default Felica T3T System Code : +#This settings will be used when application does not set this parameter +DEFAULT_SYS_CODE={FE:FE} +######################################################################### +#Set NCI credit notification timeout value +NXP_NCI_CREDIT_NTF_TIMEOUT=2 +######################################################################### + diff --git a/proprietary/vendor/etc/libnfc-nxp.conf b/proprietary/vendor/etc/libnfc-nxp.conf new file mode 100644 index 0000000..5fe39ad --- /dev/null +++ b/proprietary/vendor/etc/libnfc-nxp.conf @@ -0,0 +1,991 @@ +#################### This file is used by NXP NFC NCI HAL ##################### +############################################################################### +# Application options +# Logging Levels +# NXPLOG_DEFAULT_LOGLEVEL 0x01 +# ANDROID_LOG_DEBUG 0x03 +# ANDROID_LOG_WARN 0x02 +# ANDROID_LOG_ERROR 0x01 +# ANDROID_LOG_SILENT 0x00 +NXPLOG_EXTNS_LOGLEVEL=0x03 +NXPLOG_NCIHAL_LOGLEVEL=0x03 +NXPLOG_NCIX_LOGLEVEL=0x03 +NXPLOG_NCIR_LOGLEVEL=0x03 +NXPLOG_FWDNLD_LOGLEVEL=0x03 +NXPLOG_TML_LOGLEVEL=0x03 +NFC_DEBUG_ENABLED=1 + +############################################################################### +# Nfc Device Node name +NXP_NFC_DEV_NODE="/dev/nq-nci" + +############################################################################### +# Extension for Mifare reader enable +MIFARE_READER_ENABLE=0x01 + +############################################################################### +# File name for Firmware +NXP_FW_NAME="libsn100u_fw.so" + +############################################################################### +# System clock source selection configuration +#define CLK_SRC_XTAL 1 +#define CLK_SRC_PLL 2 +NXP_SYS_CLK_SRC_SEL=0x02 + +############################################################################### +# System clock frequency selection configuration +#define CLK_FREQ_13MHZ 1 +#define CLK_FREQ_19_2MHZ 2 +#define CLK_FREQ_24MHZ 3 +#define CLK_FREQ_26MHZ 4 +#define CLK_FREQ_38_4MHZ 5 +#define CLK_FREQ_52MHZ 6 +NXP_SYS_CLK_FREQ_SEL=0x02 + +############################################################################### +# The timeout value to be used for clock request acknowledgment +# min value = 0x01 to max = 0x06 +NXP_SYS_CLOCK_TO_CFG=0x06 + +############################################################################### +# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us +# min value = 0x01 to max = 0x1F +NXP_CLOCK_REQ_DELAY=0x1F + +############################################################################### +# NXP proprietary settings +NXP_ACT_PROP_EXTN={2F, 02, 00} + +############################################################################### +# NFC forum profile settings +NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00} + +############################################################################### +# NXP TVDD configurations settings +# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported, +# out of them only one can be configured at a time. +#NXP_EXT_TVDD_CFG=0x02 + +############################################################################### +#config1:SLALM, 3.3V for both RM and CM +#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C} + +############################################################################### +#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM, +#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms +#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C} + +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform + +################################################################################ +# A0, A5, 0D, 00, 00, 00, 00, 00, 00, FF, 03, 1F, 00, 00, 00, 00, RF_CLIF_CFG_BOOT +# A0, 6A, 08, A5, 00, A5, 00, A5, 00, A5, 00, RF_CLIF_CFG_BOOT +# A0, 34, C8, 23, 04, 3D, 01, 07, 13, 2C, 01, 00, 00, 58, 02, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 78, 05, 00, 00, 08, 07, 00, 00, 66, 08, 00, 00, 66, 08, 00, 00, 92, 09, 00, 00, 92, 09, 00, 00, DC, 0A, 00, 00, DC, 0A, 00, 00, 48, 0D, 00, 00, A0, 0F, 00, 00, A0, 0F, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 07, 13, 2C, 01, 00, 00, 58, 02, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 78, 05, 00, 00, 08, 07, 00, 00, 66, 08, 00, 00, 66, 08, 00, 00, 92, 09, 00, 00, 92, 09, 00, 00, DC, 0A, 00, 00, DC, 0A, 00, 00, 48, 0D, 00, 00, A0, 0F, 00, 00, A0, 0F, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, 8E, 12, 00, 00, RF_CLIF_CFG_BOOT +# A0, A9, ED, 40, 2A, FF, 41, 24, FF, 42, 1F, FF, 43, 1A, FF, 44, 16, FF, 45, 12, FF, 46, 0F, FF, 47, 0C, FF, 07, 2A, F1, 48, 09, FF, 08, 23, F7, 49, 07, FF, 09, 1E, F7, 4A, 05, FF, 0A, 19, FA, 4B, 03, FF, 0B, 15, FA, 4C, 01, FF, 0C, 12, F5, 0D, 0F, F2, 0E, 0C, F2, 0F, 09, F5, 10, 06, FC, 11, 06, E2, 12, 02, FB, 13, 01, F0, 14, 00, E6, 15, 00, CF, 16, 00, BA, 17, 00, A7, 18, 00, 96, 19, 00, 87, 1A, 00, 79, 1B, 00, 6C, 1C, 00, 61, 1D, 00, 57, 1E, 00, 4E, 1F, 00, 46, 20, 00, 3F, 21, 00, 38, 22, 00, 32, 23, 00, 2D, 24, 00, 28, A5, 00, 48, A6, 00, 40, A7, 00, 39, A8, 00, 33, A9, 00, 2D, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, RF_CLIF_CFG_BOOT +# A0, A6, 03, C0, 08, 08, RF_CLIF_CFG_BOOT +# A0, AF, 08, 11, 5F, 00, 2A, 11, 5F, 00, 2A, RF_CLIF_CFG_BOOT +# A0, 99, 07, 03, 00, 80, 00, 00, 80, 00, RF_CLIF_CFG_BOOT +# A0, 0D, 03, 10, 54, 20, RF_CLIF_CFG_BOOT CLIF_TEST_CONTROL_REG +# A0, 0D, 06, 10, C9, 30, 00, 40, 00, RF_CLIF_CFG_BOOT CLIF_ANA_RX_CTRL_REG +# A0, 0D, 06, 10, 84, 30, 00, 00, 00, RF_CLIF_CFG_BOOT CLIF_DCOC_CONFIG_REG +# A0, 0D, 06, 10, 60, 34, C9, 04, 00, RF_CLIF_CFG_BOOT CLIF_RXM_CTRL_REG +# A0, 0D, 06, 10, C7, 00, 00, 00, 00, RF_CLIF_CFG_BOOT CLIF_ANA_TX_TEST_CTRL_1_REG +# A0, 0D, 06, 10, C5, 00, 00, 00, 00, RF_CLIF_CFG_BOOT CLIF_ANA_PLL_CONFIG_REG +# A0, 0D, 06, 10, CD, 00, 02, 00, 00, RF_CLIF_CFG_BOOT CLIF_ANA_SPARE_CTRL_REG +# A0, 0D, 06, 11, CA, 04, 00, 00, 00, RF_CFG_IDLE_RX CLIF_ANA_AGC_DCO_CTRL_REG +# A0, 0D, 03, 11, C9, 30, RF_CFG_IDLE_RX CLIF_ANA_RX_CTRL_REG +# A0, 0D, 06, 11, 3A, 24, 48, 02, 00, RF_CFG_IDLE_RX CLIF_GCM_CONFIG2_REG +# A0, 0D, 06, 11, 39, 3F, 00, 00, 7F, RF_CFG_IDLE_RX CLIF_GCM_CONFIG1_REG +# A0, 0D, 06, 11, 38, D9, 39, A8, 00, RF_CFG_IDLE_RX CLIF_GCM_CONFIG0_REG +# A0, 0D, 06, 12, 4D, E1, 9A, 00, 00, RF_CFG_IDLE_TX CLIF_ANACTRL_TX_NOV_REG +# A0, 0D, 06, 12, 4E, FF, FF, FF, 01, RF_CFG_IDLE_TX CLIF_ANACTRL_TX1_GSN_REG +# A0, 0D, 06, 12, 4F, FF, FF, FF, 01, RF_CFG_IDLE_TX CLIF_ANACTRL_TX2_GSN_REG +# A0, 0D, 06, 12, 50, FF, FF, FF, 3F, RF_CFG_IDLE_TX CLIF_ANACTRL_TX_GSP_REG +# A0, 0D, 06, 12, 98, 89, 02, 00, 00, RF_CFG_IDLE_TX CLIF_SS_TX_CFG_REG +# A0, 0D, 06, 20, 32, 00, 00, 00, 00, RF_RM_TX CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 03, 22, 29, 22, RF_RM_TX_A106 CLIF_TX_DATA_MOD_REG +# A0, 0D, 03, 22, 30, 22, RF_RM_TX_A106 CLIF_TX_SYMBOL23_MOD_REG +# A0, 0D, 03, 23, 29, 11, RF_RM_TX_A212 CLIF_TX_DATA_MOD_REG +# A0, 0D, 03, 23, 30, 11, RF_RM_TX_A212 CLIF_TX_SYMBOL23_MOD_REG +# A0, 0D, 03, 24, 29, 07, RF_RM_TX_A424 CLIF_TX_DATA_MOD_REG +# A0, 0D, 03, 24, 30, 07, RF_RM_TX_A424 CLIF_TX_SYMBOL23_MOD_REG +# A0, 0D, 03, 25, 29, 01, RF_RM_TX_A848 CLIF_TX_DATA_MOD_REG +# A0, 0D, 03, 25, 30, 01, RF_RM_TX_A848 CLIF_TX_SYMBOL23_MOD_REG +# A0, 0D, 06, 2E, 32, 1F, 00, FF, FF, RF_RM_TX_TECHNO_V100 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 2E, 29, 00, 00, 80, 01, RF_RM_TX_TECHNO_V100 CLIF_TX_DATA_MOD_REG +# A0, 0D, 06, 2F, 32, 1F, 00, FF, FF, RF_RM_TX_TECHNO_V10 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 2F, 29, 40, 00, 70, 01, RF_RM_TX_TECHNO_V10 CLIF_TX_DATA_MOD_REG +# A0, 0D, 03, 40, C9, 00, RF_RM_RX CLIF_ANA_RX_CTRL_REG +# A0, 0D, 06, 40, 42, F0, C1, 37, CC, RF_RM_RX CLIF_DGRM_DCO_REG +# A0, 0D, 06, 40, CA, 0C, 00, 00, 01, RF_RM_RX CLIF_ANA_AGC_DCO_CTRL_REG +# A0, 0D, 03, 40, 7C, 05, RF_RM_RX CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 41, 45, 31, 02, 00, 00, RF_RM_RX_TECHNO_A CLIF_DGRM_DAC_FILTER_REG +# A0, 0D, 06, 41, 4A, 33, 1B, 1B, 33, RF_RM_RX_TECHNO_A CLIF_SIGPRO_IIR_CONFIG1_REG +# A0, 0D, 06, 41, 49, 7F, 46, 26, 00, RF_RM_RX_TECHNO_A CLIF_SIGPRO_IIR_CONFIG0_REG +# A0, 0D, 03, 42, 7C, 54, RF_RM_RX_A106 CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 42, 8D, 00, A0, A4, 64, RF_RM_RX_A106 CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 42, 8B, 00, A2, 23, 00, RF_RM_RX_A106 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 42, 89, 7F, 12, BD, 01, RF_RM_RX_A106 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 42, 88, A0, 00, 8A, 48, RF_RM_RX_A106 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 42, 44, 00, B0, 26, 23, RF_RM_RX_A106 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 42, 43, 25, 24, 01, 00, RF_RM_RX_A106 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 42, 41, FF, FF, 5F, F0, RF_RM_RX_A106 CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 42, 40, 08, 77, 33, 3A, RF_RM_RX_A106 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 51, 40, 12, 77, 33, 3A, RF_RM_RX_A106_MFC CLIF_DGRM_RSSI_REG +# A0, 0D, 03, 43, 7C, 04, RF_RM_RX_A212 CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 43, 8D, 00, 00, 00, 00, RF_RM_RX_A212 CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 43, 8B, 4C, 22, E0, 43, RF_RM_RX_A212 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 43, 89, 55, 00, 00, 00, RF_RM_RX_A212 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 43, 88, 58, C1, 86, 88, RF_RM_RX_A212 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 43, 44, 00, 34, 92, 23, RF_RM_RX_A212 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 43, 43, A5, 24, 4C, AD, RF_RM_RX_A212 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 43, 41, FF, FF, 8F, 2A, RF_RM_RX_A212 CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 43, 40, 05, 77, 33, 3D, RF_RM_RX_A212 CLIF_DGRM_RSSI_REG +# A0, 0D, 03, 44, 7C, 04, RF_RM_RX_A424 CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 44, 8D, 00, 00, 00, 00, RF_RM_RX_A424 CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 44, 8B, 28, 22, E0, 53, RF_RM_RX_A424 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 44, 89, 55, 00, 00, 00, RF_RM_RX_A424 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 44, 88, 48, 85, 04, 88, RF_RM_RX_A424 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 44, 44, 00, 34, 92, 23, RF_RM_RX_A424 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 44, 43, A5, 24, 4C, AD, RF_RM_RX_A424 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 44, 41, FF, FF, 8F, 2A, RF_RM_RX_A424 CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 44, 40, 05, 77, 33, 3D, RF_RM_RX_A424 CLIF_DGRM_RSSI_REG +# A0, 0D, 03, 45, 7C, 04, RF_RM_RX_A848 CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 45, 8D, 00, 00, 00, 00, RF_RM_RX_A848 CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 45, 8B, 09, 22, E0, A3, RF_RM_RX_A848 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 45, 89, 55, 00, 00, 00, RF_RM_RX_A848 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 45, 88, 00, 45, 02, 40, RF_RM_RX_A848 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 45, 44, 00, 34, 92, 23, RF_RM_RX_A848 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 45, 43, 00, 34, D2, 33, RF_RM_RX_A848 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 45, 41, FF, FF, 8F, 2A, RF_RM_RX_A848 CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 45, 40, 05, 77, 33, 3D, RF_RM_RX_A848 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 46, 45, 39, 02, 00, 00, RF_RM_RX_TECHNO_B CLIF_DGRM_DAC_FILTER_REG +# A0, 0D, 03, 46, 7C, 04, RF_RM_RX_TECHNO_B CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 46, 8D, 00, 00, 00, 00, RF_RM_RX_TECHNO_B CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 46, 44, 00, 34, 92, 23, RF_RM_RX_TECHNO_B CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 46, 41, FF, FF, 8F, 2A, RF_RM_RX_TECHNO_B CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 46, 4A, 33, 1B, 1B, 33, RF_RM_RX_TECHNO_B CLIF_SIGPRO_IIR_CONFIG1_REG +# A0, 0D, 06, 46, 49, 7F, 46, 26, 00, RF_RM_RX_TECHNO_B CLIF_SIGPRO_IIR_CONFIG0_REG +# A0, 0D, 06, 47, 8B, 48, 02, F0, F8, RF_RM_RX_B106 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 47, 89, 55, 00, 00, 00, RF_RM_RX_B106 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 47, 88, 70, 02, 09, 95, RF_RM_RX_B106 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 47, 43, A5, 24, 4C, ED, RF_RM_RX_B106 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 47, 40, 05, 77, 33, 3D, RF_RM_RX_B106 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 48, 8B, 48, 02, F0, 40, RF_RM_RX_B212 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 48, 89, 55, 00, 00, 00, RF_RM_RX_B212 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 48, 88, 58, C2, 86, 94, RF_RM_RX_B212 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 48, 43, A5, 24, 4C, AD, RF_RM_RX_B212 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 48, 40, 05, 77, 33, 3D, RF_RM_RX_B212 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 49, 8B, 48, 02, F0, 80, RF_RM_RX_B424 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 49, 89, 55, 00, 00, 00, RF_RM_RX_B424 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 49, 88, 48, 86, 04, 94, RF_RM_RX_B424 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 49, 43, A5, 24, 4C, AD, RF_RM_RX_B424 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 49, 40, 05, 77, 33, 3D, RF_RM_RX_B424 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 4A, 8B, 48, 02, F0, 80, RF_RM_RX_B848 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 4A, 89, 55, 00, 00, 00, RF_RM_RX_B848 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 4A, 88, 00, 46, 02, 5C, RF_RM_RX_B848 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 4A, 43, A5, 24, 4C, AD, RF_RM_RX_B848 CLIF_DGRM_BBA_REG +# A0, 0D, 06, 4A, 40, 05, 77, 33, 3D, RF_RM_RX_B848 CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 4B, 45, 39, 12, 00, 00, RF_RM_RX_TECHNO_F CLIF_DGRM_DAC_FILTER_REG +# A0, 0D, 03, 4B, 7C, 04, RF_RM_RX_TECHNO_F CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 4B, 8D, 00, 00, 00, 00, RF_RM_RX_TECHNO_F CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 4B, 43, A5, 24, 4C, 6D, RF_RM_RX_TECHNO_F CLIF_DGRM_BBA_REG +# A0, 0D, 06, 4B, 41, FF, FF, 8F, 2A, RF_RM_RX_TECHNO_F CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 4B, 40, 05, 77, 33, 3D, RF_RM_RX_TECHNO_F CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 4C, 8B, 28, 02, E0, A1, RF_RM_RX_F212 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 4C, 89, 55, 00, 00, 00, RF_RM_RX_F212 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 4C, 88, 28, 01, 80, 01, RF_RM_RX_F212 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 4C, 44, 00, 34, 92, 23, RF_RM_RX_F212 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 4C, 4A, 0E, 83, 81, 0D, RF_RM_RX_F212 CLIF_SIGPRO_IIR_CONFIG1_REG +# A0, 0D, 06, 4C, 49, C7, 05, 25, 00, RF_RM_RX_F212 CLIF_SIGPRO_IIR_CONFIG0_REG +# A0, 0D, 06, 4D, 8B, 28, 02, E0, A1, RF_RM_RX_F424 CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 4D, 89, 55, 00, 00, 00, RF_RM_RX_F424 CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 4D, 88, 50, 45, 82, 48, RF_RM_RX_F424 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 4D, 44, 00, 34, 92, 23, RF_RM_RX_F424 CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 4D, 4A, 0E, 83, 81, 0D, RF_RM_RX_F424 CLIF_SIGPRO_IIR_CONFIG1_REG +# A0, 0D, 06, 4D, 49, C7, 05, 25, 00, RF_RM_RX_F424 CLIF_SIGPRO_IIR_CONFIG0_REG +# A0, 0D, 06, 4E, 45, 31, 02, 00, 00, RF_RM_RX_TECHNO_V CLIF_DGRM_DAC_FILTER_REG +# A0, 0D, 03, 4E, 7C, 50, RF_RM_RX_TECHNO_V CLIF_SIGPRO_CONFIG_REG +# A0, 0D, 06, 4E, 8D, 00, 00, 00, 06, RF_RM_RX_TECHNO_V CLIF_SIGPRO_RM_WAIT_REG +# A0, 0D, 06, 4E, 8B, 00, A2, 24, 00, RF_RM_RX_TECHNO_V CLIF_SIGPRO_RM_CONFIG_REG +# A0, 0D, 06, 4E, 89, 7D, 84, 05, 08, RF_RM_RX_TECHNO_V CLIF_SIGPRO_RM_ENABLES_REG +# A0, 0D, 06, 4E, 44, 00, B0, 26, 23, RF_RM_RX_TECHNO_V CLIF_DGRM_CONFIG_REG +# A0, 0D, 06, 4E, 43, 25, 24, 01, 00, RF_RM_RX_TECHNO_V CLIF_DGRM_BBA_REG +# A0, 0D, 06, 4E, 41, FF, FF, 5F, F0, RF_RM_RX_TECHNO_V CLIF_DGRM_HF_ATT_REG +# A0, 0D, 06, 4E, 40, 07, 77, 33, 3D, RF_RM_RX_TECHNO_V CLIF_DGRM_RSSI_REG +# A0, 0D, 06, 4E, 4A, 2A, 8E, 8D, 2A, RF_RM_RX_TECHNO_V CLIF_SIGPRO_IIR_CONFIG1_REG +# A0, 0D, 06, 4E, 49, 5D, 27, 27, 00, RF_RM_RX_TECHNO_V CLIF_SIGPRO_IIR_CONFIG0_REG +# A0, 0D, 06, 4F, 88, F0, 00, 16, 89, RF_RM_RX_V26 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 50, 88, 98, 00, 2A, 41, RF_RM_RX_V53 CLIF_SIGPRO_RM_TECH_REG +# A0, 0D, 06, 60, 4C, 20, 0A, 00, 00, RF_CM_TX CLIF_ANACTRL_TX_CONFIG_REG +# A0, 0D, 06, 60, 4E, FF, FF, FF, 01, RF_CM_TX CLIF_ANACTRL_TX1_GSN_REG +# A0, 0D, 06, 60, 4F, FF, FF, FF, 01, RF_CM_TX CLIF_ANACTRL_TX2_GSN_REG +# A0, 0D, 06, 60, 50, FF, FF, FF, 3F, RF_CM_TX CLIF_ANACTRL_TX_GSP_REG +# A0, 0D, 06, 60, 95, FF, FF, 0F, 00, RF_CM_TX CLIF_SS_TX1_CMCFG_REG +# A0, 0D, 06, 60, 97, FF, FF, 0F, 00, RF_CM_TX CLIF_SS_TX2_CMCFG_REG +# A0, 0D, 06, 60, AB, FF, FF, 00, 00, RF_CM_TX CLIF_SS_TX_SCALE_CFG_REG +# A0, 0D, 06, 60, 99, 7F, 7F, 7F, 7F, RF_CM_TX CLIF_SS_TX1_FTRANS0_REG +# A0, 0D, 06, 60, 9D, 7F, 7F, 7F, 7F, RF_CM_TX CLIF_SS_TX2_FTRANS0_REG +# A0, 0D, 06, 60, A1, 34, 1E, 17, 15, RF_CM_TX CLIF_SS_TX1_RTRANS0_REG +# A0, 0D, 06, 60, A5, 34, 1E, 17, 15, RF_CM_TX CLIF_SS_TX2_RTRANS0_REG +# A0, 0D, 06, 60, A9, 00, 00, 00, 00, RF_CM_TX CLIF_SS_TX_TRANS_CFG_REG +# A0, 0D, 03, 61, 09, 81, RF_CM_TX_TECHNO_A CLIF_TRANSCEIVE_CONTROL_REG +# A0, 0D, 06, 62, 32, AE, 00, 7F, 00, RF_CM_TX_A106 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 63, 32, 00, 00, 00, 00, RF_CM_TX_A212 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 64, 32, 00, 00, 00, 00, RF_CM_TX_A424 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 65, 32, 00, 00, 00, 00, RF_CM_TX_A848 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 67, 32, AE, 00, 1F, 00, RF_CM_TX_B106 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 68, 32, 00, 00, 00, 00, RF_CM_TX_B212 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 69, 32, 00, 00, 00, 00, RF_CM_TX_B424 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 6A, 32, 00, 00, 00, 00, RF_CM_TX_B848 CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 6B, 32, 00, 00, 00, 00, RF_CM_TX_TECHNO_F CLIF_TX_UNDERSHOOT_CONFIG_REG +# A0, 0D, 06, 80, 7D, A0, 00, 96, BF, RF_CM_RX CLIF_SIGPRO_CM_CONFIG_REG +# A0, 0D, 06, 80, 83, 53, 10, 00, 00, RF_CM_RX CLIF_SIGPRO_CM_FILT128B_REG +# A0, 0D, 06, 80, 82, 43, 80, 00, 00, RF_CM_RX CLIF_SIGPRO_CM_FILT128A_REG +# A0, 0D, 06, 80, 80, 42, 00, 04, 00, RF_CM_RX CLIF_SIGPRO_CM_FILT64_REG +# A0, 0D, 06, 80, 7F, A2, 00, 08, 00, RF_CM_RX CLIF_SIGPRO_CM_FILT16_32_REG +# A0, 0D, 06, 80, 7E, 28, 02, 00, 00, RF_CM_RX CLIF_SIGPRO_PRE_CONFIG_REG +# A0, 0D, 06, 82, 82, 43, 80, 00, 00, RF_CM_RX_A106 CLIF_SIGPRO_CM_FILT128A_REG +# A0, 0D, 06, 83, 80, 52, 00, 04, 00, RF_CM_RX_A212 CLIF_SIGPRO_CM_FILT64_REG +# A0, 0D, 06, 84, 7F, 42, 00, 04, 00, RF_CM_RX_A424 CLIF_SIGPRO_CM_FILT16_32_REG +# A0, 0D, 06, 85, 7F, 21, 00, 04, 00, RF_CM_RX_A848 CLIF_SIGPRO_CM_FILT16_32_REG +# A0, 0D, 06, 87, 83, 53, 10, 00, 00, RF_CM_RX_B106 CLIF_SIGPRO_CM_FILT128B_REG +# A0, 0D, 06, 88, 83, 42, 00, 04, 00, RF_CM_RX_B212 CLIF_SIGPRO_CM_FILT128B_REG +# A0, 0D, 06, 89, 80, 22, 00, 04, 00, RF_CM_RX_B424 CLIF_SIGPRO_CM_FILT64_REG +# A0, 0D, 06, 8A, 7F, 21, 00, 04, 00, RF_CM_RX_B848 CLIF_SIGPRO_CM_FILT16_32_REG +# A0, 0D, 06, 8C, 80, 41, 00, 04, 00, RF_CM_RX_F212 CLIF_SIGPRO_CM_FILT64_REG +# A0, 0D, 06, 8D, 7F, A1, 00, 08, 00, RF_CM_RX_F424 CLIF_SIGPRO_CM_FILT16_32_REG +# A0, 0D, 06, 90, A9, 84, 00, 00, 00, RF_ADPLL_TXRX CLIF_SS_TX_TRANS_CFG_REG +# A0, 0D, 06, 90, A1, 7F, FF, FF, 00, RF_ADPLL_TXRX CLIF_SS_TX1_RTRANS0_REG +# A0, 0D, 06, 90, 99, 7F, 7F, 7F, 7F, RF_ADPLL_TXRX CLIF_SS_TX1_FTRANS0_REG +# A0, 0D, 06, 90, 95, FF, 00, 0F, 00, RF_ADPLL_TXRX CLIF_SS_TX1_CMCFG_REG +# A0, 0D, 06, 90, A5, 7F, FF, FF, 00, RF_ADPLL_TXRX CLIF_SS_TX2_RTRANS0_REG +# A0, 0D, 06, 90, 9D, 7F, 7F, 7F, 7F, RF_ADPLL_TXRX CLIF_SS_TX2_FTRANS0_REG +# A0, 0D, 06, 90, 97, FF, 00, 0F, 00, RF_ADPLL_TXRX CLIF_SS_TX2_CMCFG_REG +# A0, 0D, 06, 90, 4F, FF, FF, F0, 01, RF_ADPLL_TXRX CLIF_ANACTRL_TX2_GSN_REG +# A0, 0D, 06, 90, 4E, FF, FF, F0, 01, RF_ADPLL_TXRX CLIF_ANACTRL_TX1_GSN_REG +# A0, 0D, 06, 90, 38, 80, 00, 00, 0A, RF_ADPLL_TXRX CLIF_GCM_CONFIG0_REG +# A0, 0D, 06, 91, D4, F8, C4, F3, 01, RF_ADPLL_TXRX_A106 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38, RF_ADPLL_TXRX_A106 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 92, D4, F8, 04, F4, 00, RF_ADPLL_TXRX_A212 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 92, D2, 4A, 4A, 4B, 06, RF_ADPLL_TXRX_A212 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 93, D4, F8, 04, F2, 00, RF_ADPLL_TXRX_A424 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 93, D2, 57, 5A, 5B, 27, RF_ADPLL_TXRX_A424 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 94, D4, F8, 04, F1, 00, RF_ADPLL_TXRX_A848 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 94, D2, 4A, 4A, 4B, 38, RF_ADPLL_TXRX_A848 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 95, D4, F8, C4, F7, 00, RF_ADPLL_TXRX_B106 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 95, D2, 4A, 4A, 4B, 06, RF_ADPLL_TXRX_B106 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 96, D4, F8, 04, F4, 00, RF_ADPLL_TXRX_B212 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 96, D2, 4A, 4A, 4B, 06, RF_ADPLL_TXRX_B212 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 97, D4, F8, 04, F2, 00, RF_ADPLL_TXRX_B424 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 97, D2, 57, 5A, 5B, 27, RF_ADPLL_TXRX_B424 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 98, D4, F8, 04, F1, 00, RF_ADPLL_TXRX_B848 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 98, D2, 4A, 4A, 4B, 38, RF_ADPLL_TXRX_B848 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 99, D4, F8, 04, F4, 01, RF_ADPLL_TXRX_F212 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 99, D2, 4A, 4A, 4B, 38, RF_ADPLL_TXRX_F212 CLIF_ANA_ADPLL_COEFF_REG +# A0, 0D, 06, 9A, D4, F8, 04, F4, 01, RF_ADPLL_TXRX_F424 CLIF_ANA_ADPLL_FIELD_REG +# A0, 0D, 06, 9A, D2, 4A, 4A, 4B, 38, RF_ADPLL_TXRX_F424 CLIF_ANA_ADPLL_COEFF_REG + +# *** IGUANA_LITE40x20 FW VERSION = 01.10.66 *** +NXP_RF_CONF_BLK_1={ + 20, 02, E5, 05, + A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 23, 23, 23, 23, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, FF, 07, 13, 07, 05, 13, + A0, A4, 85, 14, 00, 01, 00, 00, 00, 00, 00, 00, 01, 00, 03, 00, 05, 00, 07, 00, 08, 00, 0A, 00, 0C, 00, 0E, 00, 10, 00, 11, 00, 13, 00, 14, 00, 16, 00, 18, 00, 19, 00, 1A, 00, 1C, 00, 1D, 00, 1F, 00, 20, 00, 21, 00, 24, 00, 25, 00, 27, 00, 29, 00, 2A, 00, 2C, 00, 2D, 00, 2F, 00, 31, 00, 32, 00, 34, 00, 35, 00, 37, 00, 39, 00, 3A, 00, 3C, 00, 3D, 00, 3F, 00, 41, 00, 42, 00, 44, 00, 46, 00, 47, 00, 49, 00, 4A, 00, 4C, 00, 4E, 00, 4F, 00, 51, 00, 52, 00, 54, 00, 56, 00, 57, 00, 59, 00, 5A, 00, 5C, 00, 5E, 00, 5F, 00, 61, 00, 62, 00, 64, 00, + A0, 11, 07, 01, 4A, 32, 01, C8, F6, F6, + A0, A5, 0D, 3B, 3B, 3B, 3B, 3B, 3B, FF, 03, 1F, 00, 3B, 00, 00, + A0, 6A, 10, 80, 02, 80, 02, 80, 02, 80, 02, CC, 01, CC, 01, CC, 01, CC, 01 +} + +NXP_RF_CONF_BLK_2={ + 20, 02, CC, 01, + A0, 34, C8, 23, 04, 3D, 01, 02, 18, 9A, 06, 00, 00, 8E, 07, 00, 00, A5, 08, 00, 00, A9, 09, 00, 00, CB, 0A, 00, 00, 10, 0C, 00, 00, 7A, 0D, 00, 00, 07, 0F, 00, 00, C1, 10, 00, 00, AD, 12, 00, 00, D3, 14, 00, 00, F5, 18, 00, 00, 16, 1D, 00, 00, 37, 21, 00, 00, 59, 25, 00, 00, 7B, 29, 00, 00, 9C, 2D, 00, 00, BE, 31, 00, 00, DF, 35, 00, 00, 01, 3A, 00, 00, 22, 3E, 00, 00, 43, 42, 00, 00, 65, 46, 00, 00, 86, 4A, 00, 00, 02, 18, 9A, 06, 00, 00, 8E, 07, 00, 00, A5, 08, 00, 00, A9, 09, 00, 00, CB, 0A, 00, 00, 10, 0C, 00, 00, 7A, 0D, 00, 00, 07, 0F, 00, 00, C1, 10, 00, 00, AD, 12, 00, 00, D3, 14, 00, 00, F5, 18, 00, 00, 16, 1D, 00, 00, 37, 21, 00, 00, 59, 25, 00, 00, 7B, 29, 00, 00, 9C, 2D, 00, 00, BE, 31, 00, 00, DF, 35, 00, 00, 01, 3A, 00, 00, 22, 3E, 00, 00, 43, 42, 00, 00, 65, 46, 00, 00, 86, 4A, 00, 00 +} + +NXP_RF_CONF_BLK_3={ + 20, 02, 66, 01, + A1, 0A, 62, 09, 18, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 7A, 03, 00, 00, 78, 05, 00, 00, 08, 07, 00, 00, FC, 08, 00, 00, FC, 08, 00, 00, 92, 09, 00, 00, 92, 09, 00, 00, DC, 0A, 00, 00, DC, 0A, 00, 00, 48, 0D, 00, 00, 30, 11, 00, 00, 30, 11, 00, 00, 8E, 12, 00, 00, 7C, 15, 00, 00, 70, 17, 00, 00, 58, 1B, 00, 00, 40, 1F, 00, 00, 28, 23, 00, 00, 28, 23, 00, 00, 28, 23, 00, 00 +} + +NXP_RF_CONF_BLK_4={ + 20, 02, F1, 01, + A0, A9, ED, 00, 2A, FF, 01, 24, FF, 02, 1F, FF, 03, 1A, FF, 04, 16, FF, 05, 12, FF, 06, 0F, FF, 07, 0C, FF, 08, 09, FF, 09, 07, FF, 0A, 05, FF, 0B, 03, FF, 0C, 01, FF, 0D, 00, F5, 0E, 00, DC, 0F, 00, C6, 10, 00, B3, 11, 00, A2, 12, 00, 92, 13, 00, 84, 14, 00, 77, 15, 00, 6B, 16, 00, 60, 17, 00, 57, 18, 00, 4E, 19, 00, 46, 1A, 00, 3F, 1B, 00, 39, 1C, 00, 33, 1D, 00, 2E, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A +} + +NXP_RF_CONF_BLK_5={ + 20, 02, C5, 02, + A0, 0B, BB, 00, FA, 00, 14, 6A, 2A, E8, 03, E8, 03, 06, 10, 0E, 2C, 01, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 00, 00, 00, 00, + A0, A6, 03, C0, 08, 08 +} + +NXP_RF_CONF_BLK_6={ + 20, 02, E9, 05, + A0, AB, 82, 27, 1B, 33, 04, 43, 04, 55, 04, 75, 04, 9E, 04, C7, 04, F0, 04, 20, 05, 4F, 05, 7F, 05, B8, 05, F2, 05, 2B, 06, 72, 06, BA, 06, 02, 07, 49, 07, 91, 07, F0, 07, 50, 08, AF, 08, 0F, 09, 6E, 09, E1, 09, 54, 0A, C6, 0A, 55, 0B, E5, 0B, 74, 0C, 03, 0D, 93, 0D, 52, 0E, 11, 0F, D0, 0F, 8F, 10, 4E, 11, 0D, 12, 2C, 13, 4B, 14, 69, 15, 88, 16, A7, 17, C5, 18, 44, 1A, C2, 1B, 40, 1D, BE, 1E, 9C, 20, 7A, 22, 58, 24, 95, 26, D3, 28, 10, 2B, 4E, 2D, 4A, 30, 47, 33, 43, 36, 40, 39, 3D, 3C, A1, 3F, 06, 43, 6B, 46, E6, 4A, 61, 4F, + A0, A7, 0B, 00, 02, 77, 17, 1F, 1F, 1F, 0A, FF, 19, 05, + A0, A8, 38, 00, 33, 33, 10, 00, 33, 23, 10, 00, 33, 24, 10, 4B, 23, 44, 10, CF, 22, 43, 10, CF, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, 00, 33, 22, 10, C0, 22, 23, 10, 00, 33, 22, 10, C0, 22, 23, 10, + A0, 98, 08, 74, 16, 1D, A0, 23, 74, 74, 74, + A0, 9E, 0C, 07, 16, 1D, 64, 00, 78, 00, 2B, 2C, 01, 00, 00 +} + +NXP_RF_CONF_BLK_7={ + 20, 02, FB, 14, + A0, C6, 5B, 00, 00, 04, 00, 00, 00, 3C, 00, 00, 00, 20, 80, FF, 01, 00, 00, 64, 00, 00, C0, 00, 00, 00, C0, 00, 00, 00, 01, 01, 01, 20, 01, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, + A0, 0D, 06, 10, C9, 30, 00, 40, 00, + A0, 0D, 03, 24, 29, 07, + A0, 0D, 03, 24, 30, 07, + A0, 0D, 03, 25, 29, 01, + A0, 0D, 03, 25, 30, 01, + A0, 0D, 06, 40, 42, F0, C1, 37, CC, + A0, 0D, 06, 41, 45, 31, 12, 00, 00, + A0, 0D, 03, 42, 7C, 54, + A0, 0D, 06, 42, 8D, 00, A0, A4, 64, + A0, 0D, 06, 42, 8B, 00, A2, 23, 00, + A0, 0D, 06, 42, 89, 7F, 12, BD, 01, + A0, 0D, 06, 42, 44, 00, B0, 66, 01, + A0, 0D, 06, 42, 43, 24, 24, 4D, ED, + A0, 0D, 06, 42, 41, FD, FF, 5F, F0, + A0, 0D, 06, 42, 40, 15, 77, 33, 3A, + A0, 0D, 06, 42, 4A, 00, 00, 00, 00, + A0, 0D, 06, 42, 49, 00, 00, 00, 00, + A0, 0D, 06, 51, 40, 15, 77, 33, 3A, + A0, 0D, 06, 43, 44, 00, 34, 52, 01 +} + +NXP_RF_CONF_BLK_8={ + 20, 02, FD, 1C, + A0, 0D, 06, 43, 43, A5, 64, 4C, AD, + A0, 0D, 06, 43, 40, 05, 77, 33, 3D, + A0, 0D, 06, 43, 4A, 00, 00, 00, 00, + A0, 0D, 06, 43, 49, 00, 00, 00, 00, + A0, 0D, 06, 44, 44, 00, 34, 52, 01, + A0, 0D, 06, 44, 43, A5, 64, 4C, AD, + A0, 0D, 06, 44, 40, 05, 77, 33, 3D, + A0, 0D, 06, 44, 4A, 00, 00, 00, 00, + A0, 0D, 06, 44, 49, 00, 00, 00, 00, + A0, 0D, 06, 45, 44, 00, 34, 52, 01, + A0, 0D, 06, 45, 43, A5, 64, 4C, AD, + A0, 0D, 06, 45, 40, 05, 77, 33, 3D, + A0, 0D, 06, 45, 4A, 00, 00, 00, 00, + A0, 0D, 06, 45, 49, 00, 00, 00, 00, + A0, 0D, 06, 46, 45, 39, 12, 00, 00, + A0, 0D, 06, 46, 44, 00, 34, 52, 01, + A0, 0D, 06, 47, 43, A5, 64, 4C, ED, + A0, 0D, 06, 47, 40, 15, 77, 33, 3D, + A0, 0D, 06, 47, 4A, 20, AA, 0B, 81, + A0, 0D, 06, 47, 49, B5, 44, 22, 00, + A0, 0D, 06, 48, 43, A5, 64, 4C, AD, + A0, 0D, 06, 48, 40, 05, 77, 33, 3D, + A0, 0D, 06, 48, 4A, 00, 00, 00, 00, + A0, 0D, 06, 48, 49, 00, 00, 00, 00, + A0, 0D, 06, 49, 43, A5, 64, 4C, AD, + A0, 0D, 06, 49, 40, 05, 77, 33, 3D, + A0, 0D, 06, 49, 4A, 00, 00, 00, 00, + A0, 0D, 06, 49, 49, 00, 00, 00, 00 +} + +NXP_RF_CONF_BLK_9={ + 20, 02, FA, 1C, + A0, 0D, 06, 4A, 8B, 48, 02, F0, 80, + A0, 0D, 06, 4A, 43, A5, 64, 4C, AD, + A0, 0D, 06, 4A, 40, 05, 77, 33, 3D, + A0, 0D, 06, 4A, 4A, 00, 00, 00, 00, + A0, 0D, 06, 4A, 49, 00, 00, 00, 00, + A0, 0D, 06, 4B, 43, A5, 64, 4C, 6D, + A0, 0D, 06, 4C, 44, 00, 34, 52, 01, + A0, 0D, 06, 4C, 4A, 00, 00, 00, 00, + A0, 0D, 06, 4C, 49, 00, 00, 00, 00, + A0, 0D, 06, 4C, 40, 85, 51, 33, 3D, + A0, 0D, 06, 4D, 44, 00, 34, 52, 01, + A0, 0D, 06, 4D, 4A, 00, 00, 00, 00, + A0, 0D, 06, 4D, 49, 00, 00, 00, 00, + A0, 0D, 06, 4D, 40, 85, 51, 33, 3D, + A0, 0D, 06, 4E, 45, 31, 12, 00, 00, + A0, 0D, 03, 4E, 7C, 50, + A0, 0D, 06, 4E, 8D, 00, 00, 00, 06, + A0, 0D, 06, 4E, 8B, 00, A2, 24, 00, + A0, 0D, 06, 4E, 89, 7D, 84, 05, 08, + A0, 0D, 06, 4E, 44, 00, B0, 66, 01, + A0, 0D, 06, 4E, 43, A5, 64, 5C, AD, + A0, 0D, 06, 4E, 41, FD, FF, 5F, F0, + A0, 0D, 06, 4E, 40, 15, 77, 33, 3D, + A0, 0D, 06, 4F, 4A, 2A, 8E, 8D, 2A, + A0, 0D, 06, 4F, 49, 5D, 27, 27, 00, + A0, 0D, 06, 50, 4A, 00, 00, 00, 00, + A0, 0D, 06, 50, 49, 00, 00, 00, 00, + A0, 0D, 06, 52, 4A, 00, 00, 00, 00 +} + +NXP_RF_CONF_BLK_10={ + 20, 02, FD, 1C, + A0, 0D, 06, 52, 49, 00, 00, 00, 00, + A0, 0D, 06, 53, 4A, 00, 00, 00, 00, + A0, 0D, 06, 53, 49, 00, 00, 00, 00, + A0, 0D, 06, 60, 4E, FF, FF, FF, 01, + A0, 0D, 06, 60, 4F, FF, FF, FF, 01, + A0, 0D, 06, 60, 50, FF, FF, FF, 3F, + A0, 0D, 06, 80, 7D, A0, 00, 94, BF, + A0, 0D, 06, 80, 80, 42, 00, 04, 00, + A0, 0D, 06, 80, C9, 30, 00, 00, 00, + A0, 0D, 06, 8C, 80, 41, 00, 04, 00, + A0, 0D, 06, 90, 4F, FF, FF, F0, 01, + A0, 0D, 06, 90, 4E, FF, FF, F0, 01, + A0, 0D, 06, 90, 39, 3F, 00, 00, 61, + A0, 0D, 06, 9B, A9, 84, 00, 00, 00, + A0, 0D, 06, 9B, A1, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9B, 99, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9B, 95, FF, 00, 0F, 00, + A0, 0D, 06, 9B, A5, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9B, 9D, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9B, 97, FF, 00, 0F, 00, + A0, 0D, 06, 9B, 4F, FF, FF, FF, 01, + A0, 0D, 06, 9B, 4E, FF, FF, FF, 01, + A0, 0D, 06, 91, D4, F8, 84, EF, 03, + A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38, + A0, 0D, 06, 9C, A9, 84, 00, 00, 00, + A0, 0D, 06, 9C, A1, 7F, 22, 5F, 00, + A0, 0D, 06, 9C, 99, 7F, 22, 7F, 7F, + A0, 0D, 06, 9C, 95, FF, 00, 0F, 00 +} + +NXP_RF_CONF_BLK_11={ + 20, 02, F5, 17, + A0, 0D, 06, 9C, A5, 7F, 22, 5F, 00, + A0, 0D, 06, 9C, 9D, 7F, 22, 7F, 7F, + A0, 0D, 06, 9C, 97, FF, 00, 0F, 00, + A0, 0D, 06, 9C, 4F, 9F, 88, FF, 01, + A0, 0D, 06, 9C, 4E, 9F, 88, FF, 01, + A0, 0D, 06, 95, D4, F8, 84, 75, 00, + A0, 0D, 06, 95, D2, 4A, 4B, 4B, 58, + A0, 0D, 06, 9D, A9, 84, 00, 00, 00, + A0, 0D, 06, 9D, A1, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9D, 99, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9D, 95, FF, 00, 0F, 00, + A0, 0D, 06, 9D, A5, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9D, 9D, 7F, 7F, 7F, 7F, + A0, 0D, 06, 9D, 97, FF, 00, 0F, 00, + A0, 0D, 06, 9D, 4F, FF, FF, FF, 01, + A0, 0D, 06, 9D, 4E, FF, FF, FF, 01, + A0, 0D, 06, 99, D4, F8, 04, E4, 01, + A0, 0D, 06, 99, D2, 4A, 4B, 4B, 48, + A0, AF, 09, 11, 74, 00, 23, 11, 74, 00, 23, 00, + A0, 92, 28, 37, 00, 1B, 00, FC, 81, 0F, 00, 22, 80, 0F, 00, 14, 00, 20, 70, EA, 01, 43, 18, 32, 16, 78, 30, 0D, 00, 03, 55, EA, 05, 01, 04, 68, 02, 3F, 92, 04, 00, 0C, 13, + A0, 1F, 06, 63, 00, 42, 00, 14, 00, + A0, 9A, 02, 00, 00, + A0, 99, 0A, 03, 00, 80, 00, 00, 80, 00, 00, 00, 00 +} + +NXP_RF_CONF_BLK_12={ + 20, 02, 86, 08, + A1, 0E, 02, 60, 00, + A0, 28, 26, 00, 00, 00, 00, CB, 50, 00, 00, B0, FF, 00, A0, 00, 00, 60, FF, 00, F0, 00, 00, 10, FF, 00, 40, 01, 00, C0, FE, 00, D0, 01, 00, 08, 02, 00, F8, FD, 00, + A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 24, 00, 84, 03, 00, 0F, FF, 7F, 00, 0F, FF, 7F, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 42, 00, 05, 42, 00, 00, 01, 00, 03, + A0, 0D, 03, 61, 09, 7F, + A0, 0D, 06, 82, 82, 49, 80, 00, 00, + A0, 0D, 06, 80, 82, 49, 80, 00, 00, + A0, 0D, 06, 62, 32, 0E, 00, 7F, 00, + A0, 0D, 06, 67, 32, 0E, 00, 1F, 00 +} + +NXP_RF_CONF_MAX_NUM=12 + + +############################################################################### +# Core configuration rf field filter settings to enable set to 01 to disable set +# to 00 last bit +#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 } + +############################################################################### +# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set +# to 0x00 +#NXP_I2C_FRAGMENTATION_ENABLED=0x00 + +############################################################################### +# Core configuration extensions +# It includes +# Low Power mode A007 +# eSE Wired mode settings A0ED +# UICC1 A0EC +# UICC2 A0D4 +# UICC3 A0DC +# Enable apdu logging A0B8 (01=enable, 00=disable) +# Enable L1 and L2 Lx_debug A01D (10=L1, 01=L2, 11=L1&L2) +# Low power tag detection LPTD for power reduction A068 + +# 2021-10-12 add : A1, 31, 01, 00 (default value :0x00; fix issue 0x01) +# fix: only for some special accesscard, dont direct add into libnfc_access_config.conf +# 2021-10-12 add : A1, 35, 01, 0A (default value :0x00; fix issue 0x0A) +# fix: Mifare Write cmd , after receiver ACK ,Reader send REQA/WUPA quickly, card cannot respons +# 2021-10-12 add : A1, 33, 01, 03 :(default 0x03 ) +# fix: Field on LMA init abnormally +# A1, 31, 01, 00, +# A1, 35, 01, 00, +# A1, 33, 01, 03, 00, 00, 00 +# +# +#add 2021-11-15:A1, 13, 01, 32 -- By default in FW it was set to 2ms, but we found out that it needs to be increased to 5ms (32=3*16+2) +##This config defines a guard time between Mailbox deactivation and activation that is needed to overcome a Race-condition in the JCOP Mailbox activation when a previous deactivation is not fully completed. +NXP_CORE_CONF_EXTN={20, 02, 3C, 0D, + A0, 07, 01, 01, + A0, 0A, 01, 20, + A0, EC, 01, 01, + A0, ED, 01, 01, + A0, B8, 01, 00, + A0, 8E, 01, 01, + A0, 47, 02, 00, 27, + A0, 85, 04, 50, 08, A8, 2C, + A1, 31, 01, 00, + A1, 34, 01, 04, + A1, 35, 01, 00, + A1, 13, 01, 32, + A1, 33, 04, 0B, 00, 00, 00 +} +# A0, B8, 01, 01, //enable apdu logging +# A0, 1D, 01, 11, //enable L1 and L2 Lx_debug +# } + +############################################################################### +# Core configuration settings +# It includes +# 18 - Poll Mode NFC-F: PF_BIT_RATE +# 21 - Poll Mode ISO-DEP: PI_BIT_RATE +# 28 - Poll Mode NFC-DEP: PN_NFC_DEP_SPEED +# 30 - Lis. Mode NFC-A: LA_BIT_FRAME_SDD +# 31 - Lis. Mode NFC-A: LA_PLATFORM_CONFIG +# 32 - Lis. Mode NFC-A: LA_SEL_INFO +# 33 - Lis. Mode NFC-A: LA_NFCID1 +# 38 - Lis. Mode NFC-B: LB_SENSB_INFO +# 3E - Lis. Mode NFC-B: LB_BIT_RATE +# 50 - Lis. Mode NFC-F: LF_PROTOCOL_TYPE +# 54 - Lis. Mode NFC-F: LF_CON_BITR_F +# 58 - Lis. Mode NFC-A: LI_A_RATS_TB1 +# 5B - Lis. Mode ISO-DEP: LI_A_BIT_RATE +# 68 - Active Poll Mode: PACM_BIT_RATE +# 80 - Other Param.: RF_FIELD_INFO +# 81 - Other Param.: RF_NFCEE_ACTION +# 82 - Other Param.: NFCDEP_OP +# 85 - Other Param.: NFCC_CONFIG_CONTROL +# Add 58, 01, 74, for changing FWI while route IsoDep type-A to HCE: +# Fix bug AlmId 26307, Jingdong pay is failure on Lakala T1 POS. +# Default TB1 of HCE is 0x44. Change TB1 to 0x74, +# then change FWT from 4.8ms to 38.7ms. +# TB1: high nibble 4bits is FWI, low nibble 4bits is SFGI. +NXP_CORE_CONF={ 20, 02, 36, 12, + 18, 01, 01, + 21, 01, 00, + 28, 01, 00, + 30, 01, 08, + 31, 01, 03, + 32, 01, 20, + 33, 00, + 38, 01, 01, + 3E, 01, 00, + 50, 01, 02, + 54, 01, 06, + 58, 01, 74, + 5B, 01, 00, + 68, 01, 01, + 80, 01, 01, + 81, 01, 01, + 82, 01, 0E, + 85, 01, 01 + } + +############################################################################### +#set autonomous mode +# disable autonomous 0x00 +# enable autonomous 0x01 +NXP_AUTONOMOUS_ENABLE=0x00 + +############################################################################### +#set Guard Timer +# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds) +NXP_GUARD_TIMER_VALUE=0x0F +############################################################################### +#Enable SWP full power mode when phone is power off +#NXP_SWP_FULL_PWR_ON=0x00 + +################################################################################ +#This is used to configure UICC2 at boot time. +# UICC2 0x03 +NXP_DEFAULT_UICC2_SELECT=0x03 + +############################################################################### +# CE when Screen state is locked +# This setting is for DEFAULT_AID_ROUTE, +# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE +# Disable 0x00 +# Enable 0x01 +NXP_CE_ROUTE_STRICT_DISABLE=0x01 + +############################################################################### +#Timeout in secs +NXP_SWP_RD_TAG_OP_TIMEOUT=20 + +############################################################################### +#Set the default AID route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x01 +# UICC 0x02 +# UICC2 0x03 +DEFAULT_AID_ROUTE=0x00 + +############################################################################### +#Set the ISODEP (Mifare Desfire) route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x01 +# UICC 0x02 +# UICC2 0x03 +DEFAULT_ISODEP_ROUTE=0x02 + +############################################################################### +#Set the Mifare CLT route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x01 +# UICC 0x02 +# UICC2 0x03 +DEFAULT_MIFARE_CLT_ROUTE=0x02 + +############################################################################### +#Set the Felica CLT route Location : +#This settings will be used when application does not set this parameter +# eSE 0x01 +# UICC 0x02 +# UICC2 0x03 +#Dongdong.Chang@CN.NFC.Basic.Hardware,1596847 2019/06/25, +#Shenzhen 11 line must route typeF to 0x02 (none-eSE) +#DEFAULT_FELICA_CLT_ROUTE=0x02 +DEFAULT_FELICA_CLT_ROUTE=0x01 + +############################################################################### +#Set the default AID Power state : +#This settings will be used when application does not set this parameter +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +DEFAULT_AID_PWR_STATE=0x39 + +############################################################################### +#Set the Mifare Desfire Power state : +#This settings will be used when application does not set this parameter +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +DEFAULT_DESFIRE_PWR_STATE=0x3B + +############################################################################### +#Set the Mifare CLT Power state : +#This settings will be used when application does not set this parameter +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +DEFAULT_MIFARE_CLT_PWR_STATE=0x3B + +############################################################################### +#Set the Felica CLT Power state : +#This settings will be used when application does not set this parameter +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +DEFAULT_FELICA_CLT_PWR_STATE=0x3B + +############################################################################### +#Set the T4TNfcee AID Power state : +#This settings will be used when application does not set this parameter +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B + +############################################################################### +#Set the default Felica T3T System Code OffHost route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x01 +# UICC 0x02 +# UICC2 0x03 +# Nan.Zhang@CN.NFC.Basic.Hardware.2142272, 2018/09/05 CTS Verifier HCE Felica emulator tests fail. +DEFAULT_SYS_CODE_ROUTE=0x00 + +############################################################################### +# AID Matching platform options +# AID_MATCHING_L 0x01 +# AID_MATCHING_K 0x02 +#AID_MATCHING_PLATFORM=0x01 + +############################################################################### +# P61 interface options +# SPI 0x02 +NXP_P61_LS_DEFAULT_INTERFACE=0x02 + +############################################################################### +#CHINA_TIANJIN_RF_SETTING +#Enable 0x01 +#Disable 0x00 +#NXP_CHINA_TIANJIN_RF_ENABLED=0x01 + +############################################################################### +#SWP_SWITCH_TIMEOUT_SETTING +# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60]. +# Timeout in milliseconds, for example +# No Timeout 0x00 +# 10 millisecond timeout 0x0A +#NXP_SWP_SWITCH_TIMEOUT=0x0A + +############################################################################### +# Flashing Options Configurations +# FLASH_UPPER_VERSION 0x01 +# FLASH_DIFFERENT_VERSION 0x02 +# FLASH_ALWAYS 0x03 +NXP_FLASH_CONFIG=0x02 + +############################################################################### +# P61 interface options for JCOP Download +# SPI 0x02 +NXP_P61_JCOP_DEFAULT_INTERFACE=0x02 + +############################################################################### +# Option to perform LS update every boot +# Enable 0x01 +# Disable 0x00 +NXP_LS_FORCE_UPDATE_REQUIRED=0x00 + +############################################################################### +# Option to perform JCOP update every boot +# Enable 0x01 +# Disable 0x00 +NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00 + +############################################################################### +# Bail out mode +# If set to 1, NFCC is using bail out mode for either Type A or Type B poll. +NFA_POLL_BAIL_OUT_MODE=0x01 + +############################################################################### +# White list of Hosts +# This values will be the Hosts(NFCEEs) in the HCI Network. +DEVICE_HOST_WHITE_LIST={C0, 80} + +############################################################################### +# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1. +# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm +# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block +# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check +# command is sent waiting for rsp and ntf. +PRESENCE_CHECK_ALGORITHM=2 +############################################################################### +# Enable/Disable checking default proto SE Id +# Disable 0x00 +# Enable 0x01 +NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01 +############################################################################### +# Vendor Specific Proprietary Protocol & Discovery Configuration +# Set to 0xFF if unsupported +# byte[0] NCI_PROTOCOL_18092_ACTIVE +# byte[1] NCI_PROTOCOL_B_PRIME +# byte[2] NCI_PROTOCOL_DUAL +# byte[3] NCI_PROTOCOL_15693 +# byte[4] NCI_PROTOCOL_KOVIO +# byte[5] NCI_PROTOCOL_MIFARE +# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO +# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME +# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME +NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF} + +############################################################################### +#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE +#Enable/Disable block number checks for china transit use case +#Enable 0x01 +#Disable 0x00 +#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01 + +################################################################################################### +#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1 +#Byte 0: +# |_________Bit Mask_______| Debug Mode +# b7|b6|b5|b4|b3|b2|b1|b0| +# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092) +# | | | |X | | | | Enable L2 Reader Events(ROW specific) +# | | | | |X | | | Enable Felica SystemCode +# | | | | | |X | | Enable Felica RF (all Felica CM events) +# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF) +#Byte 1: +# Enable RSSI 0x01 Byte1 Byte0 +# Disable RSSI 0x00 \__ __/ +# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI +NXP_CORE_PROP_SYSTEM_DEBUG=0x0000 + +############################################################################### +#Enable NXP NCI runtime parser library +#Enable 0x01 +#Disable 0x00 +NXP_NCI_PARSER_LIBRARY=0x00 + +############################################################################### +# Timeout value in milliseconds for JCOP OS download to complete +OS_DOWNLOAD_TIMEOUT_VALUE=60000 + +############################################################################### +# Forcing HOST to listen for a selected protocol +# 0x00 : Disable Host Listen +# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A +# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B +# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F +# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F +HOST_LISTEN_TECH_MASK=0x07 + +############################################################################### +# Enable forward functionality +# Disable 0x00 +# Enable 0x01 +# Dong.Chang@CN.NFC.Basic.Hardware.1254483, 2019/08/29 EMVco UICC only typeA emulator tests fail. +FORWARD_FUNCTIONALITY_ENABLE=0x00 + +############################################################################### +# Configure the NFC Extras to open and use a static pipe. If the value is +# not set or set to 0, then the default is use a dynamic pipe based on a +# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value +# for each EE (ESE/SIM) +OFF_HOST_ESE_PIPE_ID=0x16 +OFF_HOST_SIM_PIPE_ID=0x0A + +############################################################################### +#Set the Felica T3T System Code Power state : +#This settings will be used when application does not set this parameter +#Update Power state as per NCI2.0 +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +#DEFAULT_SYS_CODE_PWR_STATE=0x00--default +DEFAULT_SYS_CODE_PWR_STATE=0x39 + +############################################################################### +#Default Secure Element route id +DEFAULT_OFFHOST_ROUTE=0x01 + +############################################################################### +#Maximum SMB transceive wait for response +NXP_SMB_TRANSCEIVE_TIMEOUT=2000 + +############################################################################### +# Firmware file type +#.so file 0x01 +#.bin file 0x02 +NXP_FW_TYPE=0x02 + +############################################################################ +# Extended APDU length for ISO_DEP +ISO_DEP_MAX_TRANSCEIVE=0xFEFF + +######################################################################### +# Support for Amendment I SEMS specification +# Support SEMS Amendment I 0x01 +# Support NXP LS client 0x00 +NXP_GP_AMD_I_SEMS_SUPPORTED=0x01 + +############################################################################### +# Assign terminal number to each interface based on system config +NXP_SPI_SE_TERMINAL_NUM="eSE1" +############################################################################### +# Assign terminal number to each interface based on system config +#NXP_VISO_SE_TERMINAL_NUM="eSE3" +############################################################################### +# Assign terminal number to each interface based on system config +NXP_NFC_SE_TERMINAL_NUM="eSE2" +############################################################################### +#For static or dynamic dual UICC feature support +#Enable static dual uicc feature by setting value 0x00 +#Enable dynamic dual uicc feature by setting value 0x01 +NXP_DUAL_UICC_ENABLE=0x01 + +############################################################################### +# Time to wait by DH when NFCC will report eSE Cold Temp Error. +# The value is as per the UM and in seconds +NXP_SE_COLD_TEMP_ERROR_DELAY=0x05 + +############################################################################### +# Set configuration optimization decision setting +# Enable = 0x01 for RF debug +# Disable = 0x00 for MP +# NXP_SET_CONFIG_ALWAYS=0x01 +# tengming.huang@CN.NFC.Basic.Hardware.2643062 2019/12/4, Modify NFC turn on slowly +NXP_SET_CONFIG_ALWAYS=0x00 + +############################################################################### +#OffHost ESE route location for MultiSE +#ESE = 01 +OFFHOST_ROUTE_ESE={01} + +############################################################################### +#OffHost UICC route location for MultiSE +#UICC1 = 02 +#UICC2 = 03 +OFFHOST_ROUTE_UICC={02:03} + +############################################################################### +#T4T NFCEE ENABLE +#bit pos 0 = T4T NFCEE Enable +#bit pos 6 = T4T NFCEE Contactless write enable +#modify by Zhengzhou (nxp patch), 02->00 to disable NXP_T4T_NFCEE_ENABLE +#NXP_T4T_NFCEE_ENABLE=0x01--default +NXP_T4T_NFCEE_ENABLE=0x00 + +############################################################################### +#CORE_SET_CONF_CMD to reset Prop Emvco Flag +NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00} + +############################################################################### +# Firmware patch format, Only 1 and 5 should be set +# 0 -> NFC Default +# 1 -> EMVCO Default +# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process +# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF +# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF +NFA_CONFIG_FORMAT=1 + +################################################################################ +# This will enable power state required for GSMA testing. +# When this is enabled , then default AID route power state is added with this power state +# If any aid with power state 0 is added, then this power state is used. +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen off unlock +# bit pos 4 = Screen On lock +# bit pos 5 = Screen Off lock +#DEFUALT_GSMA_PWR_STATE=0x3B +################################################################################# + +################################################################################# +#VEN Toggle Config +#Disable = 0x00 +#Enable = 0x01 +ENABLE_VEN_TOGGLE=0x01 + +############################################################################### +# Mifare Reader implementation +# 0: General implementation +# 1: Legacy implementation +LEGACY_MIFARE_READER=0x00 diff --git a/proprietary/vendor/firmware/sn100u.bin b/proprietary/vendor/firmware/sn100u.bin new file mode 100644 index 0000000..f9a01bd Binary files /dev/null and b/proprietary/vendor/firmware/sn100u.bin differ diff --git a/sm8450-common-vendor.mk b/sm8450-common-vendor.mk index b13aae6..60f6460 100644 --- a/sm8450-common-vendor.mk +++ b/sm8450-common-vendor.mk @@ -10,18 +10,25 @@ PRODUCT_COPY_FILES += \ vendor/oneplus/sm8450-common/proprietary/odm/bin/hw/android.hardware.drm@1.4-service.widevine:$(TARGET_COPY_OUT_ODM)/bin/hw/android.hardware.drm@1.4-service.widevine \ vendor/oneplus/sm8450-common/proprietary/odm/bin/hw/vendor-oplus-hardware-performance-V1-service:$(TARGET_COPY_OUT_ODM)/bin/hw/vendor-oplus-hardware-performance-V1-service \ vendor/oneplus/sm8450-common/proprietary/odm/bin/hw/vendor.pixelworks.hardware.feature.irisfeature-service:$(TARGET_COPY_OUT_ODM)/bin/hw/vendor.pixelworks.hardware.feature.irisfeature-service \ + vendor/oneplus/sm8450-common/proprietary/odm/bin/hw/vendor.qti.esepowermanager@1.1-service:$(TARGET_COPY_OUT_ODM)/bin/hw/vendor.qti.esepowermanager@1.1-service \ + vendor/oneplus/sm8450-common/proprietary/odm/bin/hw/vendor.qti.secure_element@1.2-service:$(TARGET_COPY_OUT_ODM)/bin/hw/vendor.qti.secure_element@1.2-service \ vendor/oneplus/sm8450-common/proprietary/odm/bin/irisConfig:$(TARGET_COPY_OUT_ODM)/bin/irisConfig \ vendor/oneplus/sm8450-common/proprietary/odm/bin/oplus_sensor_fb:$(TARGET_COPY_OUT_ODM)/bin/oplus_sensor_fb \ vendor/oneplus/sm8450-common/proprietary/odm/etc/compatibility_matrix_oplus_bluetooth_audio_extend.xml:$(TARGET_COPY_OUT_ODM)/etc/compatibility_matrix_oplus_bluetooth_audio_extend.xml \ vendor/oneplus/sm8450-common/proprietary/odm/etc/init/android.hardware.drm@1.4-service.widevine.rc:$(TARGET_COPY_OUT_ODM)/etc/init/android.hardware.drm@1.4-service.widevine.rc \ vendor/oneplus/sm8450-common/proprietary/odm/etc/init/vendor-oplus-hardware-performance-V1-service.rc:$(TARGET_COPY_OUT_ODM)/etc/init/vendor-oplus-hardware-performance-V1-service.rc \ vendor/oneplus/sm8450-common/proprietary/odm/etc/init/vendor.pixelworks.hardware.feature.irisfeature-service.rc:$(TARGET_COPY_OUT_ODM)/etc/init/vendor.pixelworks.hardware.feature.irisfeature-service.rc \ + vendor/oneplus/sm8450-common/proprietary/odm/etc/init/vendor.qti.esepowermanager@1.1-service.rc:$(TARGET_COPY_OUT_ODM)/etc/init/vendor.qti.esepowermanager@1.1-service.rc \ + vendor/oneplus/sm8450-common/proprietary/odm/etc/init/vendor.qti.secure_element@1.2-service.rc:$(TARGET_COPY_OUT_ODM)/etc/init/vendor.qti.secure_element@1.2-service.rc \ vendor/oneplus/sm8450-common/proprietary/odm/etc/izat.conf:$(TARGET_COPY_OUT_ODM)/etc/izat.conf \ vendor/oneplus/sm8450-common/proprietary/odm/etc/media_codecs_c2.xml:$(TARGET_COPY_OUT_ODM)/etc/media_codecs_c2.xml \ vendor/oneplus/sm8450-common/proprietary/odm/etc/media_codecs_c2_dolby_audio.xml:$(TARGET_COPY_OUT_ODM)/etc/media_codecs_c2_dolby_audio.xml \ vendor/oneplus/sm8450-common/proprietary/odm/etc/media_codecs_ffmpeg.xml:$(TARGET_COPY_OUT_ODM)/etc/media_codecs_ffmpeg.xml \ vendor/oneplus/sm8450-common/proprietary/odm/etc/media_codecs_odm.xml:$(TARGET_COPY_OUT_ODM)/etc/media_codecs_odm.xml \ vendor/oneplus/sm8450-common/proprietary/odm/etc/media_profiles_V1_0.xml:$(TARGET_COPY_OUT_ODM)/etc/media_profiles_V1_0.xml \ + vendor/oneplus/sm8450-common/proprietary/vendor/etc/libnfc-nxp.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-nxp.conf \ + vendor/oneplus/sm8450-common/proprietary/vendor/etc/libnfc-nci.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-nci.conf \ + vendor/oneplus/sm8450-common/proprietary/vendor/firmware/sn100u.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/sn100u.bin \ vendor/oneplus/sm8450-common/proprietary/odm/etc/sap.conf:$(TARGET_COPY_OUT_ODM)/etc/sap.conf \ vendor/oneplus/sm8450-common/proprietary/odm/firmware/tp/22803/FW_S3910_TIANMA.img:$(TARGET_COPY_OUT_ODM)/firmware/tp/22803/FW_S3910_TIANMA.img \ vendor/oneplus/sm8450-common/proprietary/odm/firmware/tp/22803/FW_S3910_TIANMA_FAE.img:$(TARGET_COPY_OUT_ODM)/firmware/tp/22803/FW_S3910_TIANMA_FAE.img \ @@ -40,7 +47,9 @@ PRODUCT_COPY_FILES += \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/aiboost/libQnnHtpPrepare.so:$(TARGET_COPY_OUT_ODM)/lib64/aiboost/libQnnHtpPrepare.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/aiboost/libQnnHtpV69Stub.so:$(TARGET_COPY_OUT_ODM)/lib64/aiboost/libQnnHtpV69Stub.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/android.hardware.common-V2-ndk_platform.so:$(TARGET_COPY_OUT_ODM)/lib64/android.hardware.common-V2-ndk_platform.so \ + vendor/oneplus/sm8450-common/proprietary/odm/lib64/android.hardware.secure_element@1.0-impl.so:$(TARGET_COPY_OUT_ODM)/lib64/android.hardware.secure_element@1.0-impl.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/hw/vendor.pixelworks.hardware.display@1.0-impl-1.2.so:$(TARGET_COPY_OUT_ODM)/lib64/hw/vendor.pixelworks.hardware.display@1.0-impl-1.2.so \ + vendor/oneplus/sm8450-common/proprietary/odm/lib64/hw/vendor.qti.esepowermanager@1.1-impl.so:$(TARGET_COPY_OUT_ODM)/lib64/hw/vendor.qti.esepowermanager@1.1-impl.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/lib-virtual-modem-protos.so:$(TARGET_COPY_OUT_ODM)/lib64/lib-virtual-modem-protos.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/libaiboost_qnn_sr.so:$(TARGET_COPY_OUT_ODM)/lib64/libaiboost_qnn_sr.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/libaiboost_sr.so:$(TARGET_COPY_OUT_ODM)/lib64/libaiboost_sr.so \ @@ -77,6 +86,8 @@ PRODUCT_COPY_FILES += \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/vendor.pixelworks.hardware.display@1.2.so:$(TARGET_COPY_OUT_ODM)/lib64/vendor.pixelworks.hardware.display@1.2.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/vendor.pixelworks.hardware.feature@1.0.so:$(TARGET_COPY_OUT_ODM)/lib64/vendor.pixelworks.hardware.feature@1.0.so \ vendor/oneplus/sm8450-common/proprietary/odm/lib64/vendor.pixelworks.hardware.feature@1.1.so:$(TARGET_COPY_OUT_ODM)/lib64/vendor.pixelworks.hardware.feature@1.1.so \ + vendor/oneplus/sm8450-common/proprietary/odm/lib64/vendor.qti.esepowermanager@1.0.so:$(TARGET_COPY_OUT_ODM)/lib64/vendor.qti.esepowermanager@1.0.so \ + vendor/oneplus/sm8450-common/proprietary/odm/lib64/vendor.qti.esepowermanager@1.1.so:$(TARGET_COPY_OUT_ODM)/lib64/vendor.qti.esepowermanager@1.1.so \ vendor/oneplus/sm8450-common/proprietary/system/etc/sysconfig/qti_whitelist.xml:$(TARGET_COPY_OUT_SYSTEM)/etc/sysconfig/qti_whitelist.xml \ vendor/oneplus/sm8450-common/proprietary/system_ext/bin/wfdservice:$(TARGET_COPY_OUT_SYSTEM_EXT)/bin/wfdservice \ vendor/oneplus/sm8450-common/proprietary/system_ext/etc/init/wfdservice.rc:$(TARGET_COPY_OUT_SYSTEM_EXT)/etc/init/wfdservice.rc \